hardware/sejfduino: add v2.0 errata doc

This commit is contained in:
Piotr Dobrowolski 2022-06-17 19:39:13 +02:00
parent 28a51314c8
commit bc75d261a4

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## v2.0 - "kajetanless" white PCB
### #1: Programming header J6 has non-standard layout
Use a custom cable.
### #2: R1 reset line resistor is pull-down
R1 footprint *shall not be populated*, and an equivalent resistor should be put
in a pull-up configuration between reset line and ground.
Sensible place for that is between one C2 leg and reset line going next to it
to J6 programming header.
## v2.1 - "pulled-up" green PCB
Errata #2 fixed.